Struct Arm 

pub(super) struct Arm {
    ext2: VAConfigAttribValEncAV1Ext2,
    tx_mode_select: bool,
    obu_size_bytes: u32,
    level_idx: u32,
    tiles: Tiles,
    sequence: VAEncSequenceParameterBufferAV1,
    sequence_header: Vec<u8>,
    qindex_offset: u32,
}

Fields

ext2: VAConfigAttribValEncAV1Ext2

tx_mode_select: bool

obu_size_bytes: u32

level_idx: u32

tiles: Tiles

sequence: VAEncSequenceParameterBufferAV1

sequence_header: Vec<u8>

qindex_offset: u32

The bit base_q_idx stands at in the last frame header OBU written.

Implementations

impl Arm

pub(super) fn new(_attr: Option<u32>, _ext1: Option<u32>, ext2: u32) -> Self

pub(super) fn alignment(&self) -> (u32, u32)

Surfaces align to the 64x64 superblock.

pub(super) fn level(&self) -> u32

The seq_level_idx the sequence names.

fn tiles(width: u32, height: u32) -> Result<Tiles, String>

The uniform tiling of a width x height picture: as few tile columns as the codec’s widest tile allows and one tile row, or more rows where the area limit asks.

pub(super) fn configure( &mut self, n: &Negotiated, surface_width: u32, surface_height: u32, ) -> Result<(), String>

The stream’s sequence: its level from the ladder, its tiling, and the sequence header OBU the key frames carry.

pub(super) fn sequence(&mut self, n: &Negotiated, out: &mut Buffers)

pub(super) fn coded_qindex(&self, tu: &[u8]) -> Option<u32>

The base_q_idx the driver’s rate control wrote into the frame header of the coded temporal unit tu, at the offset the session named for it; None where the unit carries no frame header laid out as the session wrote it.

pub(super) fn picture( &mut self, n: &Negotiated, frame: &Frame<'_>, out: &mut Buffers, ) -> Result<(), String>

The picture: its slot, references, order hint, the frame header OBU with the offsets a driver patches, and the one tile group.